[uXMHF next-gen] Cannot boot on HP 2540p

uXMHF hangs after the following output. I guess the previous fix has not merged in. See the log:

C:\Users\Superymk\Desktop\amtterm>run.bat

C:\Users\Superymk\Desktop\amtterm>testbed1.bat

C:\Users\Superymk\Desktop\amtterm>amtterm.exe -p pas0@Testbed1 192.168.1.24
amtterm: NONE -> CONNECT (connection to host)
ipv4 192.168.1.24:16994 [192.168.1.24] 16994 open
amtterm: CONNECT -> INIT (redirection initialization)
amtterm: INIT -> AUTH (session authentication)
amtterm: AUTH -> INIT_SOL (serial-over-lan initialization)
amtterm: INIT_SOL -> RUN_SOL (serial-over-lan active)
serial-over-lan redirection ok
connected now, use ^] to escape

eXtensible Modular Hypervisor Framework (XMHF) 6.0.0
Build revision: you-gotta-have-faith-not-in-who-you-are-but-who-you-can-be
XMHF boot-loader: initializing, total modules=2
XMHF boot-loader: mod_0: start=0x1b600000, end=0x1b600200
XMHF boot-loader: mod_1: start=0x1b601000, end=0x1b609bc0
INIT(early): detected an Intel CPU
Checking whether MBI module 1 is SINIT…
YES! SINIT found @ 0x1b601000, 35776 bytes

Finding SMP info. via ACPI…
ACPI RSDP at 0x000fc600
ACPI RSDT at 0xbb3fe0ac
len=0x0000005c, headerlen=0x00000024, numentries=14
ACPI MADT at 0xbb3fa000
len=0x000000bc, record-length=144 bytes
rec type=0x00, length=8 bytes, flags=0x00000001, id=0x00
rec type=0x00, length=8 bytes, flags=0x00000001, id=0x01
rec type=0x00, length=8 bytes, flags=0x00000001, id=0x04
rec type=0x00, length=8 bytes, flags=0x00000001, id=0x05
rec type=0x00, length=8 bytes, flags=0x00000000, id=0x00
rec type=0x00, length=8 bytes, flags=0x00000000, id=0x00
rec type=0x00, length=8 bytes, flags=0x00000000, id=0x00
rec type=0x00, length=8 bytes, flags=0x00000000, id=0x00
rec type=0x01, length=12 bytes, flags=0xfec00000, id=0x00
rec type=0x02, length=10 bytes, flags=0x00000002, id=0x00
rec type=0x02, length=10 bytes, flags=0x00000009, id=0x09
rec type=0x04, length=6 bytes, flags=0x06040100, id=0x05
rec type=0x04, length=6 bytes, flags=0x06040100, id=0x05
rec type=0x04, length=6 bytes, flags=0x06040100, id=0x05
rec type=0x04, length=6 bytes, flags=0x06040100, id=0x05
rec type=0x04, length=6 bytes, flags=0x06040100, id=0x05
rec type=0x04, length=6 bytes, flags=0x06040100, id=0x05
rec type=0x04, length=6 bytes, flags=0x06040100, id=0x05
rec type=0x04, length=6 bytes, flags=0x00000100, id=0x05xmhf-bootloader: cstartup:970

original system E820 map follows:

0x0000000000000000, size=0x000000000009fc00 (1)
0x000000000009fc00, size=0x0000000000000400 (2)
0x00000000000e0000, size=0x0000000000020000 (2)
0x0000000000100000, size=0x00000000baac2000 (1)
0x00000000babc2000, size=0x0000000000700000 (2)
0x00000000bb2c2000, size=0x0000000000100000 (4)
0x00000000bb3c2000, size=0x000000000003d000 (3)
0x00000000bb3ff000, size=0x0000000000001000 (1)
0x00000000bb400000, size=0x0000000000400000 (2)
0x00000000bb800000, size=0x0000000000800000 (2)
0x00000000e0000000, size=0x0000000010000000 (2)
0x00000000fec00000, size=0x0000000000001000 (2)
0x00000000fed10000, size=0x0000000000004000 (2)
0x00000000fed19000, size=0x0000000000001000 (2)
0x00000000fed1b000, size=0x0000000000001000 (2)
0x00000000fed1c000, size=0x0000000000004000 (2)
0x00000000fee00000, size=0x0000000000001000 (2)
0x00000000ffd00000, size=0x0000000000300000 (2)
0x0000000100000000, size=0x0000000038000000 (1)
proceeding to revise E820…
E820 revision complete.
revised system E820 map follows:

0x0000000000000000, size=0x000000000009fc00 (1)
0x000000000009fc00, size=0x0000000000000400 (2)
0x00000000000e0000, size=0x0000000000020000 (2)
0x0000000000100000, size=0x0000000006100000 (1)
0x0000000006200000, size=0x000000001d200000 (2)
0x0000000023400000, size=0x00000000977c2000 (1)
0x00000000babc2000, size=0x0000000000700000 (2)
0x00000000bb2c2000, size=0x0000000000100000 (4)
0x00000000bb3c2000, size=0x000000000003d000 (3)
0x00000000bb3ff000, size=0x0000000000001000 (1)
0x00000000bb400000, size=0x0000000000400000 (2)
0x00000000bb800000, size=0x0000000000800000 (2)
0x00000000e0000000, size=0x0000000010000000 (2)
0x00000000fec00000, size=0x0000000000001000 (2)
0x00000000fed10000, size=0x0000000000004000 (2)
0x00000000fed19000, size=0x0000000000001000 (2)
0x00000000fed1b000, size=0x0000000000001000 (2)
0x00000000fed1c000, size=0x0000000000004000 (2)
0x00000000fee00000, size=0x0000000000001000 (2)
0x00000000ffd00000, size=0x0000000000300000 (2)
0x0000000100000000, size=0x0000000038000000 (1)xmhf-bootloader: XMHF binary base=06200000, reserved size=1d200000 bytes
xmhf-bootloader: RUNTIME_PARAMETER_BLOCK_BASE=06600000
xmhf-bootloader: xslbootinfo=06600000, magic=f00ddead
xmhf-bootloader: cstartup:1098

setupvcpus: cpustacks range 0x01e20000-0x02220000 in 0x00004000 chunks
setupvcpus: vcpubuffers range 0x01e12dc0-0x01e13dc0 in 0x00000010 chunks
CPU #0: vcpu_vaddr_ptr=0x01e12dc0, esp=0x01e24000
CPU #1: vcpu_vaddr_ptr=0x01e12dd0, esp=0x01e28000
CPU #2: vcpu_vaddr_ptr=0x01e12de0, esp=0x01e2c000
CPU #3: vcpu_vaddr_ptr=0x01e12df0, esp=0x01e30000
Sending INIT IPI to all APs…Done.
Sending SIPI-0…
AP(0x04): Waiting for DRTM establishment…
AP(0x05): Waiting for DRTM establishment…
AP(0x01): Waiting for DRTM establishment…Done.
Sending SIPI-1…Done.
APs should be awake!
BSP(0x00): Rallying APs…
BSP(0x00): APs ready, doing DRTM…
LAPIC base and status=0xfee00900
Sending INIT IPI to all APs…
Done.

INIT(early): sent INIT IPI to APs
****** INIT(early): Begin TXT Stuff ******
TXT.ERRORCODE=0
LT.ESTS=0
txt_verify_platform
CPU is VMX-capable
CPU is SMX-capable
SENTER should work.
SMX enabled in CR4
TXT chipset and all needed capabilities (0x000001fd) present
bios_data (@0x1e23ec8, 200000000):
version: 3
bios_sinit_size: 0x0 (0)
lcp_pd_base: 0x0
lcp_pd_size: 0x0 (0)
num_logical_procs: 4
flags: 0x00000000
CR0 and EFLAGS OK
no machine check errors
CPU is ready for SENTER
chipset ids: vendor: 0x8086, device: 0xa000, revision: 0x1f
chipset production fused: 1
1 ACM chipset id entries:
vendor: 0x8086, device: 0xa000, flags: 0x1, revision: 0x1, extended: 0x0
SINIT matches platform
copied SINIT (size=8bc0) to 0xbb700000
AC mod base alignment OK
AC module header dump for SINIT:
type: 0x2 (ACM_TYPE_CHIPSET)
length: 0xa1 (161)
version: 0
chipset_id: 0xa000
flags: 0x0
pre_production: 0
debug_signed: 0
vendor: 0x8086
date: 0x20111122
size*4: 0x8bc0 (35776)
code_control: 0x0
error_entry_point: 0x0
gdt_limit 0x28, gdt_base 0x500
entry point (seg_sel:entry_point): 0x00000008:00006601
scratch_size: 0x8f (143) info_table:
uuid: {0x7fc03aaa, 0x46a7, 0x18db, 0xac2e,
{0x69, 0x8f, 0x8d, 0x41, 0x7f, 0x5a}}
ACM_UUID_V3
chipset_acm_type: 0x1 (SINIT)
version: 3
length: 0x28 (40)
chipset_id_list: 0x4e8
os_sinit_data_ver: 0x5
min_mle_hdr_ver: 0x00020000
capabilities: 0x0000000e
rlp_wake_getsec: 0
rlp_wake_monitor: 2
ecx_pgtbl: 4
acm_ver: 51
chipset list:
count: 1
entry 0:
flags: 0x1
vendor_id: 0x8086
device_id: 0xa000
revision_id: 0x1
extended_id: 0x0
file addresses:
&g_mle_hdr=0x1e11040
MLE header:
uuid={0x9082ac5a, 0x476f, 0x74a7, 0x5c0f,
{0x55, 0xa2, 0xcb, 0x51, 0xb6, 0x42}}
length=34
version=00020001
entry_point=00000080
first_valid_page=00000000
mle_start_off=0
mle_end_off=10000
capabilities: 0x00000007
rlp_wake_getsec: 1
rlp_wake_monitor: 2
ecx_pgtbl: 4
MLE start=6203000, end=6213000, size=10000
ptab_size=3000, ptab_base=0x6200000
*(uint64_t *)pg_dir_ptr_tab = 0x 6201001
*(uint64_t *)pg_dir = 0x 6202001
pte = 0x06202000
*pte = 0x 6203001
pte = 0x06202008
*pte = 0x 6204001
pte = 0x06202010
*pte = 0x 6205001
pte = 0x06202018
*pte = 0x 6206001
pte = 0x06202020
*pte = 0x 6207001
pte = 0x06202028
*pte = 0x 6208001
pte = 0x06202030
*pte = 0x 6209001
pte = 0x06202038
*pte = 0x 620a001
pte = 0x06202040
*pte = 0x 620b001
pte = 0x06202048
*pte = 0x 620c001
pte = 0x06202050
*pte = 0x 620d001
pte = 0x06202058
*pte = 0x 620e001
pte = 0x06202060
*pte = 0x 620f001
pte = 0x06202068
*pte = 0x 6210001
pte = 0x06202070
*pte = 0x 6211001
pte = 0x06202078
*pte = 0x 6212001
bios_data (@0x1e23928, 0):
version: 3
bios_sinit_size: 0x0 (0)
lcp_pd_base: 0x0
lcp_pd_size: 0x0 (0)
num_logical_procs: 4
flags: 0x00000000
Copied mle_hdr (0x01e11040, 0x34 bytes) into SL (0x06203000)

vtd_pmr_lo_base=0000000006200000, size=0000000000200000os_sinit_data (@0x1e239fc, 620300000000034):
version: 5
mle_ptab: 0x6200000
mle_size: 0x10000 (65536)
mle_hdr_base: 0x0
vtd_pmr_lo_base: 0x6200000
vtd_pmr_lo_size: 0x200000
vtd_pmr_hi_base: 0x0
vtd_pmr_hi_size: 0x0
lcp_po_base: 0x0
lcp_po_size: 0x0 (0)
capabilities: 0x00000002
rlp_wake_getsec: 0
rlp_wake_monitor: 2
ecx_pgtbl: 0
efi_rsdt_ptr: 0x0
executing GETSEC[SENTER]…
gp_s1_bspstack: überXMHF – alive and starting…
EFER=0000000000000800
CR4=00004030
CR3=0842b000
xcbootinfo at = 0x06600000
numE820Entries=21
system memory map buffer at 0x06600010
numCPUEntries=4
cpuinfo buffer at 0x06600514
XMHF size= 488636416 bytes
OS bootmodule at 0x1b600000, size=512 bytes
cmdline = “/boot/xmhf-x86-vmx-x86pc.bin.gz serial=115200,8n1,0x5080”
SL: runtime at 0x06200000; size=0x1d200000 bytes
SL: XMHF_BOOTINFO at 0x06600000, magic=0xf00ddead

Number of E820 entries = 21
0x0000000000000000, size=0x000000000009fc00 (1)
0x000000000009fc00, size=0x0000000000000400 (2)
0x00000000000e0000, size=0x0000000000020000 (2)
0x0000000000100000, size=0x0000000006100000 (1)
0x0000000006200000, size=0x000000001d200000 (2)
0x0000000023400000, size=0x00000000977c2000 (1)
0x00000000babc2000, size=0x0000000000700000 (2)
0x00000000bb2c2000, size=0x0000000000100000 (4)
0x00000000bb3c2000, size=0x000000000003d000 (3)
0x00000000bb3ff000, size=0x0000000000001000 (1)
0x00000000bb400000, size=0x0000000000400000 (2)
0x00000000bb800000, size=0x0000000000800000 (2)
0x00000000e0000000, size=0x0000000010000000 (2)
0x00000000fec00000, size=0x0000000000001000 (2)
0x00000000fed10000, size=0x0000000000004000 (2)
0x00000000fed19000, size=0x0000000000001000 (2)
0x00000000fed1b000, size=0x0000000000001000 (2)
0x00000000fed1c000, size=0x0000000000004000 (2)
0x00000000fee00000, size=0x0000000000001000 (2)
0x00000000ffd00000, size=0x0000000000300000 (2)
0x0000000100000000, size=0x0000000038000000 (1)SL: txt_heap = 0xbb720000
SL: os_mle_data = 0x096abd48, size=616 bytes
SL: Validated MTRRs
SL: Restored MTRRs
rdsp.signature=2052545020445352
rdsp.checksum=8f
rdsp.oemid=48 50 51 4f 45 4d
rdsp.revision=02
rdsp.rsdtaddress=bb3fe0ac
rdsp.length=00000024
rdsp.xsdtaddress=00000000bb3fe120
rdsp.xchecksum=e1
rdsp.rsvd0=48 50 51
gp_s1_scaniommu:131 RSDT at bb3fe0ac, len=92 bytes, hdrlen=36 bytes
rsdt.signature=0000008354445352
rsdt.length=0000005c
rsdt.revision=01
rsdt.checksum=38
rsdt.oemid=48 50 51 4f 45 4d
rsdt.oemtableid=43504d2d43494c53
rsdt.oemrevision=0000000f
rsdt.creatorid=20202020
rsdt.creatorrevision=01000013
gp_s1_scaniommu:159 RSDT entry list at bb3fe0d0, len=14dmar.signature=0000003052414d44
dmar.length=000000b8
dmar.revision=01
dmar.checksum=e9
dmar.oemid=49 4e 54 45 4c 20
dmar.oemtableid=20454c41445f5043
dmar.oemrevision=00000001
dmar.creatorid=4c544e49
dmar.creatorrevision=00000001
dmar.hostaddresswidth=23
dmar.flags=00
dmar.rsvd0=49 4e 54 45 4c 20 43 50 5f 44
gp_s1_scaniommu:208 DMAR at bb3d0000gp_s1_scaniommu:239 total DRHDs detected= 3 units
gp_s1_scaniommu: DMAR Devices:
Device 0 type=0000, length=0018, flags=00, rsvdz0=00
Device 0 on PCI seg 0000; base=0x00000000fed90000
cap=0x00c9008020e30272
ecap=0x0000000000001000
iotlb_regaddr=fed90108, iva_regaddr=fed90100
Device 1 type=0000, length=0018, flags=00, rsvdz0=00
Device 1 on PCI seg 0000; base=0x00000000fed91000
cap=0x00c0000020230272
ecap=0x0000000000001000
iotlb_regaddr=fed91108, iva_regaddr=fed91100
Device 2 type=0000, length=0010, flags=01, rsvdz0=00
Device 2 on PCI seg 0000; base=0x00000000fed93000
cap=0x00c9008020630272
ecap=0x0000000000001000
iotlb_regaddr=fed93108, iva_regaddr=fed93100
gp_s1_scaniommu: Vt-d: maxhandle = 3, dmar table addr=0xbb3d0000
gp_s1_iommuinit: Setting up DRHD unit 0…
gp_s1_iommuinit: DRHD unit 0 - 3-level page-walk
gp_s1_iommuinit: DRHD unit 0 - ND capability = 2
gp_s1_iommuinit: Successfully setup DRHD unit 0
gp_s1_iommuinit: Setting up DRHD unit 1…
gp_s1_iommuinit: DRHD unit 1 - 3-level page-walk
gp_s1_iommuinit: DRHD unit 1 - ND capability = 2
gp_s1_iommuinit: Successfully setup DRHD unit 1
gp_s1_iommuinit: Setting up DRHD unit 2…
gp_s1_iommuinit: DRHD unit 2 - 3-level page-walk
gp_s1_iommuinit: DRHD unit 2 - ND capability = 2
gp_s1_iommuinit: Successfully setup DRHD unit 2
gp_s1_iommuinit: final page-walk level=3
Device idx=0, ffff:ffff:0 (vid:did=ffff:0, type=2)…
MEM region: fee00000 - fee01000
Device idx=1, ffff:ffff:0 (vid:did=ffff:1, type=3)…
MEM region: fed40000 - fed41000
Device idx=2, ffff:ffff:0 (vid:did=ffff:2, type=4)…
MEM region: fed20000 - fed21000
MEM region: fed30000 - fed31000
Device idx=3, ffff:ffff:0 (vid:did=ffff:4, type=6)…
IO region: 5080 - 5088
Device idx=4, ffff:ffff:0 (vid:did=ffff:3, type=5)…
MEM region: fed90000 - fed91000
Device idx=5, ffff:ffff:1 (vid:did=ffff:3, type=5)…
MEM region: fed91000 - fed92000
Device idx=6, ffff:ffff:2 (vid:did=ffff:3, type=5)…
MEM region: fed93000 - fed94000
Device idx=7, 0:0:0 (vid:did=8086:44, type=0)…
Device idx=8, 0:2:0 (vid:did=8086:46, type=0)…
MEM region: d0000000 - d0400000
MEM region: c0000000 - d0000000
IO region: 5088 - 5090
Device idx=9, 0:16:0 (vid:did=8086:3b64, type=0)…
MEM region: d4724000 - d4724010
Device idx=10, 0:16:3 (vid:did=8086:3b67, type=0)…
IO region: 5080 - 5088
MEM region: d472a000 - d472b000
Device idx=11, 0:19:0 (vid:did=8086:10ea, type=0)…
MEM region: d4700000 - d4720000
MEM region: d4729000 - d472a000
IO region: 5000 - 5020
Device idx=12, 0:1a:0 (vid:did=8086:3b3c, type=0)…
MEM region: d4728000 - d4728400
Device idx=13, 0:1b:0 (vid:did=8086:3b56, type=0)…
MEM region: d4720000 - d4724000
Device idx=14, 0:1c:0 (vid:did=8086:3b42, type=1)…
Device idx=15, 0:1c:1 (vid:did=8086:3b44, type=1)…
Device idx=16, 0:1c:3 (vid:did=8086:3b48, type=1)…
Device idx=17, 0:1d:0 (vid:did=8086:3b34, type=0)…
MEM region: d4727000 - d4727400
Device idx=18, 0:1e:0 (vid:did=8086:2448, type=1)…
Device idx=19, 0:1f:0 (vid:did=8086:3b07, type=0)…
Device idx=20, 0:1f:2 (vid:did=8086:3b2e, type=0)…
IO region: 5078 - 5080
IO region: 509c - 50a0
IO region: 5070 - 5078
IO region: 5098 - 509c
IO region: 5050 - 5060
IO region: 5040 - 5050
Device idx=21, 0:1f:5 (vid:did=8086:3b2d, type=0)…
IO region: 5068 - 5070
IO region: 5094 - 5098
IO region: 5060 - 5068
IO region: 5090 - 5094
IO region: 5030 - 5040
IO region: 5020 - 5030
Device idx=22, 0:1f:6 (vid:did=8086:3b32, type=0)…
MEM region: d4726000 - d4727000
Device idx=23, 43:0:0 (vid:did=8086:4239, type=0)…
MEM region: d0500000 - d0502000
Device idx=24, 44:6:0 (vid:did=1180:832, type=0)…
MEM region: d0401000 - d0401800
Device idx=25, 44:6:1 (vid:did=1180:822, type=0)…
MEM region: d0403000 - d0403100
Device idx=26, 44:6:2 (vid:did=1180:843, type=0)…
MEM region: d0402000 - d0402100
Device idx=27, 44:6:3 (vid:did=1180:476, type=ff)…
MEM region: d0400000 - d0401000
MEM region: 20000d0 - 0
MEM region: 454540 - 7454550
MEM region: d0403000 - d0404000
MEM region: d0403000 - d0404000
MEM region: d0400000 - d0401000
Device idx=28, ff:0:0 (vid:did=8086:2c62, type=0)…
Device idx=29, ff:0:1 (vid:did=8086:2d01, type=0)…
Device idx=30, ff:2:0 (vid:did=8086:2d10, type=0)…
Device idx=31, ff:2:1 (vid:did=8086:2d11, type=0)…
Device idx=32, ff:2:2 (vid:did=8086:2d12, type=0)…
Device idx=33, ff:2:3 (vid:did=8086:2d13, type=0)…

IA32_MTRRCAP: 0000000000001d08 VCNT=8, FIX=1, WC=1, SMRR=1
gp_s2_gathersysmemtypes: gathered MTRR details, number of entries=96gp_s2_setupiotbl: setup unverified slab legacy I/O permission tables
gp_s2_setupmpgtblv: populated verified slabs’ memory page tables
gp_s2_setupmpgtblu: slab 102772864 --> ppopulating rich-guest page-tables…
gp_s2_setupmpgtblu: slab 102772864 --> rich-guest page-tables populated
gp_s2_setupgdt: setup TSS CPU idx=0 with base address=661d000, iobitmap=661e000
, size=16383 bytesgp_s2_setupgdt: setup TSS CPU idx=1 with base address=6621000, iobitmap=6622000
, size=16383 bytesgp_s2_setupgdt: setup TSS CPU idx=4 with base address=662d000, iobitmap=662e000
, size=16383 bytesgp_s2_setupgdt: setup TSS CPU idx=5 with base address=6631000, iobitmap=6632000
, size=16383 bytesgp_s2_setuptss_inittss: tssidx=0, iotbl_addr=1000
gp_s2_setuptss_inittss: tssidx=1, iotbl_addr=1000
gp_s2_setuptss_inittss: tssidx=4, iotbl_addr=1000
gp_s2_setuptss_inittss: tssidx=5, iotbl_addr=1000
gp_s3_entry: proceeding to switch page-tables…

BSP: mle_join.gdt_limit = 1f
BSP: mle_join.gdt_base = 11030
BSP: mle_join.seg_sel = 8
BSP: mle_join.entry_point = 10000BSP: joining RLPs to MLE with MONITOR wakeup
BSP: rlp_wakeup_addr=0xbb701d20
gp_s5_entry[4]: ESP=096bffd0
gp_s5_setupcpustate[4]: GDT loaded
gp_s5_setupcpustate[4]: Reloaded CS
gp_s5_setupcpustate[4]: Reloaded segment registers
gp_s5_setupcpustate[4]: TR loaded
xcexhub_slab_main[4]: IDT loaded
gp_s5_setupcpustate[4]: set IOPL to CPL-3
gp_s5_setupcpustate[4]: set LAPIC base address to 00000000fee00800
gp_s5_setupcpustate[4]: NX protections enabled
gp_s5_setupcpustate[4]: Set CR0.EM to be VMX compatible
XCIHUB[cpu=4]: intalling icpt handler
__xmhfhic_x86vmx_setupvmxstate[4]: CR0_ALWAYS1BITS_MASK=0x80000021
__xmhfhic_x86vmx_setupvmxstate[4]: CR4_ALWAYS1BITS_MASK=0x00002000
gp_s5_setupcpustate[4]: Setup VMX state
gp_s5_entry[5]: ESP=096c3fd0
gp_s5_setupcpustate[5]: GDT loaded
gp_s5_setupcpustate[5]: Reloaded CS
gp_s5_setupcpustate[5]: Reloaded segment registers
gp_s5_setupcpustate[5]: TR loaded
xcexhub_slab_main[5]: IDT loaded
gp_s5_setupcpustate[5]: set IOPL to CPL-3
gp_s5_setupcpustate[5]: set LAPIC base address to 00000000fee00800
gp_s5_setupcpustate[5]: NX protections enabled
gp_s5_setupcpustate[5]: Set CR0.EM to be VMX compatible
XCIHUB[cpu=5]: intalling icpt handler
__xmhfhic_x86vmx_setupvmxstate[5]: CR0_ALWAYS1BITS_MASK=0x80000021
__xmhfhic_x86vmx_setupvmxstate[5]: CR4_ALWAYS1BITS_MASK=0x00002000
gp_s5_setupcpustate[5]: Setup VMX state
gp_s5_entry[1]: ESP=096b3fd0
gp_s5_setupcpustate[1]: GDT loaded
gp_s5_setupcpustate[1]: Reloaded CS
gp_s5_setupcpustate[1]: Reloaded segment registers
gp_s5_setupcpustate[1]: TR loaded
xcexhub_slab_main[1]: IDT loaded
gp_s5_setupcpustate[1]: set IOPL to CPL-3
gp_s5_setupcpustate[1]: set LAPIC base address to 00000000fee00800
gp_s5_setupcpustate[1]: NX protections enabled
gp_s5_setupcpustate[1]: Set CR0.EM to be VMX compatible
XCIHUB[cpu=1]: intalling icpt handler
__xmhfhic_x86vmx_setupvmxstate[1]: CR0_ALWAYS1BITS_MASK=0x80000021
__xmhfhic_x86vmx_setupvmxstate[1]: CR4_ALWAYS1BITS_MASK=0x00002000
gp_s5_setupcpustate[1]: Setup VMX state
gp_s5_entry[0]: ESP=096abfcc
gp_s5_setupcpustate[0]: GDT loaded
gp_s5_setupcpustate[0]: Reloaded CS
gp_s5_setupcpustate[0]: Reloaded segment registers
gp_s5_setupcpustate[0]: TR loaded
xcexhub_slab_main[0]: IDT loaded
gp_s5_setupcpustate[0]: set IOPL to CPL-3
gp_s5_setupcpustate[0]: set LAPIC base address to 00000000fee00900
gp_s5_setupcpustate[0]: NX protections enabled
gp_s5_setupcpustate[0]: Set CR0.EM to be VMX compatible
XCIHUB[cpu=0]: intalling icpt handler
__xmhfhic_x86vmx_setupvmxstate[0]: CR0_ALWAYS1BITS_MASK=0x80000021
__xmhfhic_x86vmx_setupvmxstate[0]: CR4_ALWAYS1BITS_MASK=0x00002000
gp_s5_setupcpustate[0]: Setup VMX state

Yes the PR in this task: Fix überXMHF v6.0.0 documentation and add support for 1st Generation Intel Core CPUs is yet to be merged. Am on it. Will post back here once I have merged that into master and develop.

This should be fixed now with release v6.1.0. See here: überXMHF v6.1.0 released

Let me know if you can give this a quick test and I can close this topic. Thanks!

uxmhf v6.1.0 works on 2540p. I used the uspark v6.0.0, and the 4.4.236-uberxmhf kernel.

Perfect! Thanks for testing it. Am going to close this topic thread now that we are good to go. Thanks @superymk!